1. Field of the Invention
The present invention relates generally to methods for making semiconductor devices, and particularly to methods for making bipolar semiconductor devices of high integration and high speed operation with high controllability of the current amplification factor h.sub.FE.
2. Description of the Prior Art
In recent years, semiconductor devices are developing in a direction of more and more high speed operation and high integration, and for that reason studies and proposals are made on the technology of forming shallow junctions. Especially in bipolar semiconductor devices, the technology of forming the shallow base junction is a key point in deciding characteristic of the transistor.
FIG. 1 is a sectional elevation view of an essential part of a bipolar transistor utilizing polycrystalline silicon as its emitter electrode. In FIG. 1, there is formed a collector region 1 of an n-type epitaxial layer, a base layer 2 of a p-type diffused region, and an emitter region 6 of an n-conductivity type diffused region are formed. Oxide layer 3 has an opening 301 wherein a polycrystalline silicon layer 4 is formed as emitter electrode. The base layer 2 is formed by ion-implantation of boron. Thereafter, the opening 301 is bored by a photolithographic method, and therein the polycrystalline silicon layer 4 is then As ions are implanted in the polycrystalline silicon layer 4 by ion implantation. Thereafter, by a heat treatment, the As ions are driven into the base region 2 to form the n-type emitter region 6. The above-mentioned polycrystalline silicon layer 4 is usually formed by a CVD (chemical vapour deposition) method. In such a CVD method of forming the polycrystalline silicon, the wafer is heated to a temperature of 400.degree.-700.degree. C., and accordingly a thin oxide film 5 is formed with a thickness of several tens .ANG. to several hundred .ANG. at the interface between the surface of the emitter region 6 and the bottom of the polycrystalline silicon layer 4. The formation of the natural oxide film 5 cannot be avoided in the usual CVD method.
In the above-mentioned conventional method, use of the polycrystalline silicon layer 4 as the electrode is based on the following four reasons: Reason 1 is that by using As implanted in the polycrystalline silicon layer 4 as a diffusion source, and by thermally driving it into the single crystal silicon wafer, the emitter junction can be made shallower than the case where As ions are directly implanted into the single crystalline silicon. Reason 2 is that though making the emitter region requires high dose of As, such a high dose implantation is received by the polycrystalline silicon layer 4 and accordingly the underlying emitter region 6 is not subject to serious defects by the high dose ion-implantation. Reason 3 is that when the Al electrode is formed in the final stage, even though the Al reacts with the Si polycrystalline silicon layer 4, the reaction does not go through the single crystal emitter region 6 but remains there. Therefore, an undesirable emitter-base short-circuit or emitter-collector short circuit is prevented. Reason 4 is that in the polycrystalline silicon layer 4, the lifetimes of holes from the base region 2 is short, and accordingly h.sub.FE can be made high.
FIG. 2 shows concentration profile of impurity of the conventional bipolar transistor of the example of FIG. 1. The abscissa is graduated by depth from the interface between the polycrystalline silicon layer 4 and the single crystalline wafer surface, and the ordinate is graduated by concentration of the impurity. In the graph, curve A (solid curve) shows the profile of emitter impurity, curve B (dotted line) shows the profile of the base impurity and curve C (chain line curve) shows profile of collector impurity. In the graph, point D represents the emitter junction, point E the base junction. As shown in FIG. 2, As-ions in the polycrystalline silicon has very small mobility, and thereby hardly contributes to the operation of the bipolar transistor. Donor (AS-ions) actually operating in the emitter region is given as difference between As-ions and B.sup.+ -ions, which are compensating each other. That is, the As-ions in the region I can only contribute as donors to the emitter action. Similarly, B.sup.+ -ions contributing to the operation of the base as acceptor is the total impurity concentration of B.sup.+ in the II region. The As-ions and B.sup.+ -ions in the region III compensate each other and thereby do not contribute to the action of the bipolar transistor.
In order to improve the high speed and high integration of the transistor, it is necessary to make the emitter width junction and base junction shallower and also the base width depth should be thin. But as shown in FIG. 2, as the junctions become shallower the effect of the compensation between the donor (As) and acceptor (B.sup.+) increases more and more, thereby the total amount of acting donors in the emitter decreases. Accordingly, the total number of electrons reaching from the emitter through the base to the collector decreases, thereby deteriorating the injection efficiency, and hence, the current amplification factor h.sub.FE. However, as far as the present technology of diffusion and ion implantation are used, the compensation effect of the donor and acceptor in the emitter cannot be avoided. Therefore, in order to make a very shallow junction, another technology must be introduced.
Furthermore, according to the present chemical vapour deposition method, when a polycrystalline silicon layer is formed, the natural oxide film is inevitably formed at the interface between the underlying single crystalline silicon wafer and the polycrystalline silicon layer. Therefore, when As is thermally treated to be driven into the underlying single crystalline silicon from the polycrystalline silicon layer used as a diffusion source, the natural oxide film adversely influences the As-driving, thereby making the impurity distribution unstable. Hence, the current amplification factor h.sub.FE becomes unstable, thus, controllability of h.sub.FE in manufacturing becomes poor. Especially when the natural oxide film is thick, the As-ions undesirably pile up at the interface between the single crystalline silicon and polycrystalline silicon as shown by dotted circle F in FIG. 2. This results in such problems that the impurity As-ions hardly diffuse into the single crystalline silicon, and making the dispersion of h.sub.FE large, hence makes the production yield low.